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STMicroelectronics /STM32H7x7_CM4 /RCC /AHB1RSTR

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Interpret as AHB1RSTR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (DMA1RST)DMA1RST 0 (DMA2RST)DMA2RST 0 (ADC12RST)ADC12RST 0 (ARTRST)ARTRST 0 (ETH1MACRST)ETH1MACRST 0 (USB1OTGRST)USB1OTGRST 0 (USB2OTGRST)USB2OTGRST

Description

RCC AHB1 Peripheral Reset Register

Fields

DMA1RST

DMA1 block reset
DMA2RST

DMA2 block reset
ADC12RST

ADC1&2 block reset
ARTRST

ART block reset
ETH1MACRST

ETH1MAC block reset
USB1OTGRST

USB1OTG block reset
USB2OTGRST

USB2OTG block reset

Links

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data