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STMicroelectronics /STM32L0x1 /RCC /AHBENR

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Interpret as AHBENR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (DMAEN)DMAEN 0 (MIFEN)MIFEN 0 (CRCEN)CRCEN 0 (CRYPEN)CRYPEN

Description

AHB peripheral clock enable register

Fields

DMAEN

DMA clock enable bit
MIFEN

NVM interface clock enable bit
CRCEN

CRC clock enable bit
CRYPEN

Crypto clock enable bit

Links

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data