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STMicroelectronics /STM32L0x1 /RCC /APB2RSTR

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Interpret as APB2RSTR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (SYSCFGRST)SYSCFGRST 0 (TIM21RST)TIM21RST 0 (TIM22RST)TIM22RST 0 (ADCRST)ADCRST 0 (SPI1RST)SPI1RST 0 (USART1RST)USART1RST 0 (DBGRST)DBGRST

Description

APB2 peripheral reset register

Fields

SYSCFGRST

System configuration controller reset
TIM21RST

TIM21 timer reset
TIM22RST

TIM22 timer reset
ADCRST

ADC interface reset
SPI1RST

SPI 1 reset
USART1RST

USART1 reset
DBGRST

DBG reset

Links

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data