STMicroelectronics /STM32L0x2 /SYSCFG_COMP /CFGR3

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as CFGR3

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (EN_BGAP)EN_BGAP 0SEL_VREF_OUT 0 (ENBUF_BGAP_ADC)ENBUF_BGAP_ADC 0 (ENBUF_SENSOR_ADC)ENBUF_SENSOR_ADC 0 (ENBUF_VREFINT_COMP)ENBUF_VREFINT_COMP 0 (ENREF_RC48MHz)ENREF_RC48MHz 0 (REF_RC48MHz_RDYF)REF_RC48MHz_RDYF 0 (SENSOR_ADC_RDYF)SENSOR_ADC_RDYF 0 (VREFINT_ADC_RDYF)VREFINT_ADC_RDYF 0 (VREFINT_COMP_RDYF)VREFINT_COMP_RDYF 0 (VREFINT_RDYF)VREFINT_RDYF 0 (REF_LOCK)REF_LOCK

Description

SYSCFG configuration register 3

Fields

EN_BGAP

Vref Enable bit

SEL_VREF_OUT

BGAP_ADC connection bit

ENBUF_BGAP_ADC

VREFINT reference for ADC enable bit

ENBUF_SENSOR_ADC

Sensor reference for ADC enable bit

ENBUF_VREFINT_COMP

VREFINT reference for comparator 2 enable bit

ENREF_RC48MHz

VREFINT reference for 48 MHz RC oscillator enable bit

REF_RC48MHz_RDYF

VREFINT for 48 MHz RC oscillator ready flag

SENSOR_ADC_RDYF

Sensor for ADC ready flag

VREFINT_ADC_RDYF

VREFINT for ADC ready flag

VREFINT_COMP_RDYF

VREFINT for comparator ready flag

VREFINT_RDYF

VREFINT ready flag

REF_LOCK

REF_CTRL lock bit

Links

()