Regviz

STMicroelectronics /STM32L0x2 /SYSCFG_COMP /COMP1_CSR

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as COMP1_CSR

Share

Cut and paste this URL to share the unmodified register and value:

https://regviz.com/r/STMicroelectronics/STM32L0x2/SYSCFG_COMP/COMP1_CSR#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (COMP1EN)COMP1EN 0COMP1INNSEL 0 (COMP1WM)COMP1WM 0 (COMP1LPTIMIN1)COMP1LPTIMIN1 0 (COMP1POLARITY)COMP1POLARITY 0 (COMP1VALUE)COMP1VALUE 0 (COMP1LOCK)COMP1LOCK

Description

Comparator 1 control and status register

Fields

COMP1EN

Comparator 1 enable bit
COMP1INNSEL

Comparator 1 Input Minus connection configuration bit
COMP1WM

Comparator 1 window mode selection bit
COMP1LPTIMIN1

Comparator 1 LPTIM input propagation bit
COMP1POLARITY

Comparator 1 polarity selection bit
COMP1VALUE

Comparator 1 output status bit
COMP1LOCK

COMP1_CSR register lock bit

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data