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STMicroelectronics /STM32L4x3 /RCC /APB2RSTR

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Interpret as APB2RSTR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (SYSCFGRST)SYSCFGRST 0 (SDMMCRST)SDMMCRST 0 (TIM1RST)TIM1RST 0 (SPI1RST)SPI1RST 0 (USART1RST)USART1RST 0 (TIM15RST)TIM15RST 0 (TIM16RST)TIM16RST 0 (SAI1RST)SAI1RST

Description

APB2 peripheral reset register

Fields

SYSCFGRST

System configuration (SYSCFG) reset
SDMMCRST

SDMMC reset
TIM1RST

TIM1 timer reset
SPI1RST

SPI1 reset
USART1RST

USART1 reset
TIM15RST

TIM15 timer reset
TIM16RST

TIM16 timer reset
SAI1RST

Serial audio interface 1 (SAI1) reset

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data