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STMicroelectronics /STM32L4x5 /RCC /AHB2RSTR

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Interpret as AHB2RSTR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (GPIOARST)GPIOARST 0 (GPIOBRST)GPIOBRST 0 (GPIOCRST)GPIOCRST 0 (GPIODRST)GPIODRST 0 (GPIOERST)GPIOERST 0 (GPIOFRST)GPIOFRST 0 (GPIOGRST)GPIOGRST 0 (GPIOHRST)GPIOHRST 0 (OTGFSRST)OTGFSRST 0 (ADCRST)ADCRST 0 (AESRST)AESRST 0 (RNGRST)RNGRST

Description

AHB2 peripheral reset register

Fields

GPIOARST

IO port A reset
GPIOBRST

IO port B reset
GPIOCRST

IO port C reset
GPIODRST

IO port D reset
GPIOERST

IO port E reset
GPIOFRST

IO port F reset
GPIOGRST

IO port G reset
GPIOHRST

IO port H reset
OTGFSRST

USB OTG FS reset
ADCRST

ADC reset
AESRST

AES hardware accelerator reset
RNGRST

Random number generator reset

Links

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data