channel x peripheral address register
| EN | Channel enable |
| TCIE | Transfer complete interrupt enable |
| HTIE | Half transfer interrupt enable |
| TEIE | Transfer error interrupt enable |
| DIR | Data transfer direction |
| CIRC | Circular mode |
| PINC | Peripheral increment mode |
| MINC | Memory increment mode |
| PSIZE | Peripheral size |
| MSIZE | Memory size |
| PL | Channel priority level |
| MEM2MEM | Memory to memory mode |
| DBM | double-buffer mode |
| CT | current target memory of DMA transfer in double-buffer mode |
| SECM | secure mode |
| SSEC | security of the DMA transfer from the source |
| DSEC | security of the DMA transfer to the destination |
| PRIV | privileged mode |