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STMicroelectronics /STM32L562 /GTZC_TZIC /SR2

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Interpret as SR2

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (TIM8F)TIM8F 0 (USART1F)USART1F 0 (TIM15F)TIM15F 0 (TIM16F)TIM16F 0 (TIM17F)TIM17F 0 (SAI1F)SAI1F 0 (SAI2F)SAI2F 0 (DFSDM1F)DFSDM1F 0 (CRCF)CRCF 0 (TSCF)TSCF 0 (ICACHEF)ICACHEF 0 (ADCF)ADCF 0 (AESF)AESF 0 (HASHF)HASHF 0 (RNGF)RNGF 0 (PKAF)PKAF 0 (SDMMC1F)SDMMC1F 0 (FMC_REGF)FMC_REGF 0 (OCTOSPI1_REGF)OCTOSPI1_REGF 0 (RTCF)RTCF 0 (PWRF)PWRF 0 (SYSCFGF)SYSCFGF 0 (DMA1F)DMA1F 0 (DMA2F)DMA2F 0 (DMAMUX1F)DMAMUX1F 0 (RCCF)RCCF 0 (FLASHF)FLASHF 0 (FLASH_REGF)FLASH_REGF 0 (EXTIF)EXTIF 0 (OTFDEC1F)OTFDEC1F

Description

TZIC interrupt status register 2

Fields

TIM8F

TIM8F
USART1F

USART1F
TIM15F

TIM15F
TIM16F

TIM16F
TIM17F

TIM17F
SAI1F

SAI1F
SAI2F

SAI2F
DFSDM1F

DFSDM1F
CRCF

CRCF
TSCF

TSCF
ICACHEF

ICACHEF
ADCF

ADCF
AESF

AESF
HASHF

HASHF
RNGF

RNGF
PKAF

PKAF
SDMMC1F

SDMMC1F
FMC_REGF

FMC_REGF
OCTOSPI1_REGF

OCTOSPI1_REGF
RTCF

RTCF
PWRF

PWRF
SYSCFGF

SYSCFGF
DMA1F

DMA1F
DMA2F

DMA2F
DMAMUX1F

DMAMUX1F
RCCF

RCCF
FLASHF

FLASHF
FLASH_REGF

FLASH_REGF
EXTIF

EXTIF
OTFDEC1F

OTFDEC1F

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data