Regviz

STMicroelectronics /STM32L562 /LPUART1 /CR2

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as CR2

Share

Cut and paste this URL to share the unmodified register and value:

https://regviz.com/r/STMicroelectronics/STM32G070/LPUART/CR2#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (ADDM7)ADDM7 0STOP 0 (SWAP)SWAP 0 (RXINV)RXINV 0 (TXINV)TXINV 0 (TAINV)TAINV 0 (MSBFIRST)MSBFIRST 0ADD0_30ADD4_7

Description

Control register 2

Fields

ADDM7

7-bit Address Detection/4-bit Address Detection
STOP

STOP bits
SWAP

Swap TX/RX pins
RXINV

RX pin active level inversion
TXINV

TX pin active level inversion
TAINV

Binary data inversion
MSBFIRST

Most significant bit first
ADD0_3

Address of the USART node
ADD4_7

Address of the USART node

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data