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STMicroelectronics /STM32L562 /SAI1 /PDMCR

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Interpret as PDMCR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (PDMEN)PDMEN 0MICNBR 0 (CKEN1)CKEN1 0 (CKEN2)CKEN2

Description

PDM control register

Fields

PDMEN

PDM enable
MICNBR

MICNBR
CKEN1

Clock enable of bitstream clock number 1
CKEN2

CKEN2

Links

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data