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STMicroelectronics /STM32L562 /SYSCFG /CFGR1

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Interpret as CFGR1

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (BOOSTEN)BOOSTEN 0 (ANASWVDD)ANASWVDD 0 (I2C_PB6_FMP)I2C_PB6_FMP 0 (I2C_PB7_FMP)I2C_PB7_FMP 0 (I2C_PB8_FMP)I2C_PB8_FMP 0 (I2C_PB9_FMP)I2C_PB9_FMP 0 (I2C1_FMP)I2C1_FMP 0 (I2C2_FMP)I2C2_FMP 0 (I2C3_FMP)I2C3_FMP 0 (I2C4_FMP)I2C4_FMP

Description

configuration register 1

Fields

BOOSTEN

I/O analog switch voltage booster enable
ANASWVDD

GPIO analog switch control voltage selection
I2C_PB6_FMP

Fast-mode Plus (Fm+) driving capability activation on PB6
I2C_PB7_FMP

Fast-mode Plus (Fm+) driving capability activation on PB7
I2C_PB8_FMP

Fast-mode Plus (Fm+) driving capability activation on PB8
I2C_PB9_FMP

Fast-mode Plus (Fm+) driving capability activation on PB9
I2C1_FMP

I2C1 Fast-mode Plus driving capability activation
I2C2_FMP

I2C2 Fast-mode Plus driving capability activation
I2C3_FMP

I2C3 Fast-mode Plus driving capability activation
I2C4_FMP

I2C4_FMP

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data