ADVREGEN=B_0x0, ADEN=B_0x0, ADSTP=B_0x0, ADSTART=B_0x0, ADCAL=B_0x0, ADDIS=B_0x0
ADC control register
| ADEN | ADC enable command This bit is set by software to enable the ADC. The ADC is effectively ready to operate once the ADRDY flag has been set. It is cleared by hardware when the ADC is disabled, after the execution of the ADDIS command. 0 (B_0x0): ADC is disabled (OFF state) 1 (B_0x1): Write 1 to enable the ADC. |
| ADDIS | ADC disable command 0 (B_0x0): No ADDIS command ongoing 1 (B_0x1): Write 1 to disable the ADC. Read 1 means that an ADDIS command is in progress. |
| ADSTART | ADC start conversion command 0 (B_0x0): No ADC conversion is ongoing. 1 (B_0x1): Write 1 to start the ADC. Read 1 means that the ADC is operating and may be converting. |
| ADSTP | ADC stop conversion command 0 (B_0x0): No ADC stop conversion command ongoing 1 (B_0x1): Write 1 to stop the ADC. Read 1 means that an ADSTP command is in progress. |
| ADVREGEN | ADC Voltage Regulator Enable 0 (B_0x0): ADC voltage regulator disabled 1 (B_0x1): ADC voltage regulator enabled |
| ADCAL | ADC calibration This bit is set by software to start the calibration of the ADC. 0 (B_0x0): Calibration complete 1 (B_0x1): Write 1 to calibrate the ADC. Read at 1 means that a calibration is in progress. |