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STMicroelectronics /STM32U031 /ADC /ADC_DR

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Interpret as ADC_DR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0DATA

Description

ADC data register

Fields

DATA

Converted data These bits are read-only. They contain the conversion result from the last converted channel. The data are left- or right-aligned as shown in Figure141: Data alignment and resolution (oversampling disabled: OVSE = 0) on page1332. Just after a calibration is complete, DATA[6:0] contains the calibration factor.

Links

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data