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STMicroelectronics /STM32U031 /DAC /DAC_SHSR1

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Interpret as DAC_SHSR1

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0TSAMPLE1

Description

DAC channel1 sample and hold sample time register

Fields

TSAMPLE1

DAC channel1 sample time (only valid in Sample and hold mode) These bits can be written when the DAC channel1 is disabled or also during normal operation. in the latter case, the write can be done only when BWST1 of DAC_SR register is low, If BWST11=11, the write operation is ignored.

Links

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data