RT10=B_0x0, RT1=B_0x0, RT5=B_0x0, RT15=B_0x0, RT17=B_0x0, RT20=B_0x0, RT21=B_0x0, RT14=B_0x0, RT12=B_0x0, RT3=B_0x0, RT6=B_0x0, RT18=B_0x0, RT7=B_0x0, RT11=B_0x0, RT4=B_0x0, RT2=B_0x0, RT0=B_0x0, RT16=B_0x0, RT13=B_0x0, RT8=B_0x0, RT19=B_0x0, RT9=B_0x0
EXTI rising trigger selection register
| RT0 | Rising trigger event configuration bit of configurable line x (x1=1211to10) Each bit enables/disables the rising edge trigger for the event and interrupt on the corresponding line. Bits 18 and 19 are available only on STM32U0x3xx devices. They are reserved on STM32U031xx devices. 0 (B_0x0): Disable 1 (B_0x1): Enable |
| RT1 | Rising trigger event configuration bit of configurable line x (x1=1211to10) Each bit enables/disables the rising edge trigger for the event and interrupt on the corresponding line. Bits 18 and 19 are available only on STM32U0x3xx devices. They are reserved on STM32U031xx devices. 0 (B_0x0): Disable 1 (B_0x1): Enable |
| RT2 | Rising trigger event configuration bit of configurable line x (x1=1211to10) Each bit enables/disables the rising edge trigger for the event and interrupt on the corresponding line. Bits 18 and 19 are available only on STM32U0x3xx devices. They are reserved on STM32U031xx devices. 0 (B_0x0): Disable 1 (B_0x1): Enable |
| RT3 | Rising trigger event configuration bit of configurable line x (x1=1211to10) Each bit enables/disables the rising edge trigger for the event and interrupt on the corresponding line. Bits 18 and 19 are available only on STM32U0x3xx devices. They are reserved on STM32U031xx devices. 0 (B_0x0): Disable 1 (B_0x1): Enable |
| RT4 | Rising trigger event configuration bit of configurable line x (x1=1211to10) Each bit enables/disables the rising edge trigger for the event and interrupt on the corresponding line. Bits 18 and 19 are available only on STM32U0x3xx devices. They are reserved on STM32U031xx devices. 0 (B_0x0): Disable 1 (B_0x1): Enable |
| RT5 | Rising trigger event configuration bit of configurable line x (x1=1211to10) Each bit enables/disables the rising edge trigger for the event and interrupt on the corresponding line. Bits 18 and 19 are available only on STM32U0x3xx devices. They are reserved on STM32U031xx devices. 0 (B_0x0): Disable 1 (B_0x1): Enable |
| RT6 | Rising trigger event configuration bit of configurable line x (x1=1211to10) Each bit enables/disables the rising edge trigger for the event and interrupt on the corresponding line. Bits 18 and 19 are available only on STM32U0x3xx devices. They are reserved on STM32U031xx devices. 0 (B_0x0): Disable 1 (B_0x1): Enable |
| RT7 | Rising trigger event configuration bit of configurable line x (x1=1211to10) Each bit enables/disables the rising edge trigger for the event and interrupt on the corresponding line. Bits 18 and 19 are available only on STM32U0x3xx devices. They are reserved on STM32U031xx devices. 0 (B_0x0): Disable 1 (B_0x1): Enable |
| RT8 | Rising trigger event configuration bit of configurable line x (x1=1211to10) Each bit enables/disables the rising edge trigger for the event and interrupt on the corresponding line. Bits 18 and 19 are available only on STM32U0x3xx devices. They are reserved on STM32U031xx devices. 0 (B_0x0): Disable 1 (B_0x1): Enable |
| RT9 | Rising trigger event configuration bit of configurable line x (x1=1211to10) Each bit enables/disables the rising edge trigger for the event and interrupt on the corresponding line. Bits 18 and 19 are available only on STM32U0x3xx devices. They are reserved on STM32U031xx devices. 0 (B_0x0): Disable 1 (B_0x1): Enable |
| RT10 | Rising trigger event configuration bit of configurable line x (x1=1211to10) Each bit enables/disables the rising edge trigger for the event and interrupt on the corresponding line. Bits 18 and 19 are available only on STM32U0x3xx devices. They are reserved on STM32U031xx devices. 0 (B_0x0): Disable 1 (B_0x1): Enable |
| RT11 | Rising trigger event configuration bit of configurable line x (x1=1211to10) Each bit enables/disables the rising edge trigger for the event and interrupt on the corresponding line. Bits 18 and 19 are available only on STM32U0x3xx devices. They are reserved on STM32U031xx devices. 0 (B_0x0): Disable 1 (B_0x1): Enable |
| RT12 | Rising trigger event configuration bit of configurable line x (x1=1211to10) Each bit enables/disables the rising edge trigger for the event and interrupt on the corresponding line. Bits 18 and 19 are available only on STM32U0x3xx devices. They are reserved on STM32U031xx devices. 0 (B_0x0): Disable 1 (B_0x1): Enable |
| RT13 | Rising trigger event configuration bit of configurable line x (x1=1211to10) Each bit enables/disables the rising edge trigger for the event and interrupt on the corresponding line. Bits 18 and 19 are available only on STM32U0x3xx devices. They are reserved on STM32U031xx devices. 0 (B_0x0): Disable 1 (B_0x1): Enable |
| RT14 | Rising trigger event configuration bit of configurable line x (x1=1211to10) Each bit enables/disables the rising edge trigger for the event and interrupt on the corresponding line. Bits 18 and 19 are available only on STM32U0x3xx devices. They are reserved on STM32U031xx devices. 0 (B_0x0): Disable 1 (B_0x1): Enable |
| RT15 | Rising trigger event configuration bit of configurable line x (x1=1211to10) Each bit enables/disables the rising edge trigger for the event and interrupt on the corresponding line. Bits 18 and 19 are available only on STM32U0x3xx devices. They are reserved on STM32U031xx devices. 0 (B_0x0): Disable 1 (B_0x1): Enable |
| RT16 | Rising trigger event configuration bit of configurable line x (x1=1211to10) Each bit enables/disables the rising edge trigger for the event and interrupt on the corresponding line. Bits 18 and 19 are available only on STM32U0x3xx devices. They are reserved on STM32U031xx devices. 0 (B_0x0): Disable 1 (B_0x1): Enable |
| RT17 | Rising trigger event configuration bit of configurable line x (x1=1211to10) Each bit enables/disables the rising edge trigger for the event and interrupt on the corresponding line. Bits 18 and 19 are available only on STM32U0x3xx devices. They are reserved on STM32U031xx devices. 0 (B_0x0): Disable 1 (B_0x1): Enable |
| RT18 | Rising trigger event configuration bit of configurable line x (x1=1211to10) Each bit enables/disables the rising edge trigger for the event and interrupt on the corresponding line. Bits 18 and 19 are available only on STM32U0x3xx devices. They are reserved on STM32U031xx devices. 0 (B_0x0): Disable 1 (B_0x1): Enable |
| RT19 | Rising trigger event configuration bit of configurable line x (x1=1211to10) Each bit enables/disables the rising edge trigger for the event and interrupt on the corresponding line. Bits 18 and 19 are available only on STM32U0x3xx devices. They are reserved on STM32U031xx devices. 0 (B_0x0): Disable 1 (B_0x1): Enable |
| RT20 | Rising trigger event configuration bit of configurable line x (x1=1211to10) Each bit enables/disables the rising edge trigger for the event and interrupt on the corresponding line. Bits 18 and 19 are available only on STM32U0x3xx devices. They are reserved on STM32U031xx devices. 0 (B_0x0): Disable 1 (B_0x1): Enable |
| RT21 | Rising trigger event configuration bit of configurable line x (x1=1211to10) Each bit enables/disables the rising edge trigger for the event and interrupt on the corresponding line. Bits 18 and 19 are available only on STM32U0x3xx devices. They are reserved on STM32U031xx devices. 0 (B_0x0): Disable 1 (B_0x1): Enable |