RegViz: Visualize RCC_APBSMENR1 Bitfield

STMicroelectronics /STM32U031 /RCC /RCC_APBSMENR1

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Interpret as RCC_APBSMENR1

TIM6SMEN=B_0x0, RTCAPBSMEN=B_0x0, LPTIM2SMEN=B_0x0, PWRSMEN=B_0x0, DAC1SMEN=B_0x0, USART4SMEN=B_0x0, USBSMEN=B_0x0, I2C1SMEN=B_0x0, LCDSMEN=B_0x0, TIM7SMEN=B_0x0, TIM3SMEN=B_0x0, I2C2SMEN=B_0x0, LPUART1SMEN=B_0x0, LPTIM1SMEN=B_0x0, I2C3SMEN=B_0x0, SPI2SMEN=B_0x0, LPUART2SMEN=B_0x0, OPAMPSMEN=B_0x0, USART2SMEN=B_0x0, TIM2SMEN=B_0x0, USART3SMEN=B_0x0, WWDGSMEN=B_0x0

Description

APB peripheral clock enable in Sleep/Stop mode register 1

Fields

TIM2SMEN	TIM2 timer clock enable during Sleep mode Set and cleared by software. 0 (B_0x0): Disable 1 (B_0x1): Enable
TIM3SMEN	TIM3 timer clock enable during Sleep mode Set and cleared by software. 0 (B_0x0): Disable 1 (B_0x1): Enable
TIM6SMEN	TIM6 timer clock enable during Sleep mode Set and cleared by software. 0 (B_0x0): Disable 1 (B_0x1): Enable
TIM7SMEN	TIM7 timer clock enable during Sleep mode Set and cleared by software. 0 (B_0x0): Disable 1 (B_0x1): Enable
LPUART2SMEN	LPUART2 clock enable during Sleep and Stop modes Set and cleared by software. 0 (B_0x0): Disable 1 (B_0x1): Enable
LCDSMEN	LCD clock enable during Sleep mode⁽¹⁾ Set and cleared by software. 0 (B_0x0): Disable 1 (B_0x1): Enable
RTCAPBSMEN	RTC APB clock enable during Sleep mode Set and cleared by software. 0 (B_0x0): Disable 1 (B_0x1): Enable
WWDGSMEN	WWDG clock enable during Sleep and Stop modes Set and cleared by software. 0 (B_0x0): Disable 1 (B_0x1): Enable
USBSMEN	USB clock enable during Sleep mode⁽¹⁾ Set and cleared by software. 0 (B_0x0): Disable 1 (B_0x1): Enable
SPI2SMEN	SPI2 clock enable during Sleep mode Set and cleared by software. 0 (B_0x0): Disable 1 (B_0x1): Enable
USART2SMEN	USART2 clock enable during Sleep and Stop modes Set and cleared by software. 0 (B_0x0): Disable 1 (B_0x1): Enable
USART3SMEN	USART3 clock enable during Sleep mode Set and cleared by software. 0 (B_0x0): Disable 1 (B_0x1): Enable
USART4SMEN	USART4 clock enable during Sleep mode Set and cleared by software. 0 (B_0x0): Disable 1 (B_0x1): Enable
LPUART1SMEN	LPUART1 clock enable during Sleep and Stop modes Set and cleared by software. 0 (B_0x0): Disable 1 (B_0x1): Enable
I2C1SMEN	I2C1 clock enable during Sleep and Stop modes Set and cleared by software. 0 (B_0x0): Disable 1 (B_0x1): Enable
I2C2SMEN	I2C2 clock enable during Sleep mode Set and cleared by software. 0 (B_0x0): Disable 1 (B_0x1): Enable
I2C3SMEN	I2C3 clock enable during Sleep mode Set and cleared by software. 0 (B_0x0): Disable 1 (B_0x1): Enable
OPAMPSMEN	OPAMP clock enable during Sleep and Stop modes Set and cleared by software. 0 (B_0x0): Disable 1 (B_0x1): Enable
PWRSMEN	Power interface clock enable during Sleep mode Set and cleared by software. 0 (B_0x0): Disable 1 (B_0x1): Enable
DAC1SMEN	DAC1 interface clock enable during Sleep and Stop modes Set and cleared by software. 0 (B_0x0): Disable 1 (B_0x1): Enable
LPTIM2SMEN	Low Power Timer 2 clock enable during Sleep and Stop modes Set and cleared by software. 0 (B_0x0): Disable 1 (B_0x1): Enable
LPTIM1SMEN	Low Power Timer 1 clock enable during Sleep and Stop modes Set and cleared by software. 0 (B_0x0): Disable 1 (B_0x1): Enable

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