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STMicroelectronics /STM32U031 /RCC /RCC_IOPRSTR

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Interpret as RCC_IOPRSTR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (B_0x0)GPIOARST 0 (B_0x0)GPIOBRST 0 (B_0x0)GPIOCRST 0 (B_0x0)GPIODRST 0 (B_0x0)GPIOERST 0 (B_0x0)GPIOFRST

GPIOARST=B_0x0, GPIOCRST=B_0x0, GPIOFRST=B_0x0, GPIOERST=B_0x0, GPIOBRST=B_0x0, GPIODRST=B_0x0

Description

I/O port reset register

Fields

GPIOARST

I/O port A reset This bit is set and cleared by software.

0 (B_0x0): no effect

1 (B_0x1): Reset I/O port A
GPIOBRST

I/O port B reset This bit is set and cleared by software.

0 (B_0x0): no effect

1 (B_0x1): Reset I/O port B
GPIOCRST

I/O port C reset This bit is set and cleared by software.

0 (B_0x0): no effect

1 (B_0x1): Reset I/O port C
GPIODRST

I/O port D reset This bit is set and cleared by software.

0 (B_0x0): no effect

1 (B_0x1): Reset I/O port D
GPIOERST

I/O port E reset This bit is set and cleared by software.

0 (B_0x0): no effect

1 (B_0x1): Reset I/O port E
GPIOFRST

I/O port F reset This bit is set and cleared by software.

0 (B_0x0): no effect

1 (B_0x1): Reset I/O port F

Links

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data