RXNE=B_0x0, FTLVL=B_0x0, BSY=B_0x0, OVR=B_0x0, FRLVL=B_0x0, TXE=B_0x0, CRCERR=B_0x0, FRE=B_0x0, MODF=B_0x0
SPI status register
| RXNE | Receive buffer not empty 0 (B_0x0): Rx buffer empty 1 (B_0x1): Rx buffer not empty |
| TXE | Transmit buffer empty 0 (B_0x0): Tx buffer not empty 1 (B_0x1): Tx buffer empty |
| CRCERR | CRC error flag Note: This flag is set by hardware and cleared by software writing 0. 0 (B_0x0): CRC value received matches the SPI_RXCRCR value 1 (B_0x1): CRC value received does not match the SPI_RXCRCR value |
| MODF | Mode fault This flag is set by hardware and reset by a software sequence. Refer to Section1: Mode fault (MODF) on page1964 for the software sequence. 0 (B_0x0): No mode fault occurred 1 (B_0x1): Mode fault occurred |
| OVR | Overrun flag This flag is set by hardware and reset by a software sequence. 0 (B_0x0): No overrun occurred 1 (B_0x1): Overrun occurred |
| BSY | Busy flag This flag is set and cleared by hardware. Note: The BSY flag must be used with caution: refer to Section133.4.10: SPI status flags and Procedure for disabling the SPI on page1954. 0 (B_0x0): SPI not busy 1 (B_0x1): SPI is busy in communication or Tx buffer is not empty |
| FRE | Frame format error This flag is used for SPI in TI slave mode. Refer to Section133.4.11: SPI error flags. This flag is set by hardware and reset when SPI_SR is read by software. 0 (B_0x0): No frame format error 1 (B_0x1): A frame format error occurred |
| FRLVL | FIFO reception level These bits are set and cleared by hardware. Note: These bits are not used in SPI receive-only mode while CRC calculation is enabled. 0 (B_0x0): FIFO empty 1 (B_0x1): 1/4 FIFO 2 (B_0x2): 1/2 FIFO 3 (B_0x3): FIFO full |
| FTLVL | FIFO transmission level These bits are set and cleared by hardware. 0 (B_0x0): FIFO empty 1 (B_0x1): 1/4 FIFO 2 (B_0x2): 1/2 FIFO 3 (B_0x3): FIFO full (considered as FULL when the FIFO threshold is greater than 1/2) |