STMicroelectronics /STM32U031 /TIM2 /TIM2_CR2

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Interpret as TIM2_CR2

MMS=B_0x0, CCDS=B_0x0, TI1S=B_0x0

Description

TIM2 control register 2

Fields

CCDS	Capture/compare DMA selection 0 (B_0x0): CCx DMA request sent when CCx event occurs 1 (B_0x1): CCx DMA requests sent when update event occurs
MMS	Master mode selection 0 (B_0x0): Reset - the UG bit from the TIMx_EGR register is used as trigger output (TRGO). 1 (B_0x1): Enable - the Counter enable signal, CNT_EN, is used as trigger output (TRGO). 2 (B_0x2): Update - The update event is selected as trigger output (TRGO). 3 (B_0x3): Compare Pulse - The trigger output send a positive pulse when the CC1IF flag is to be set (even if it was already high), as soon as a capture or a compare match occurred. 4 (B_0x4): Compare - OC1REFC signal is used as trigger output (TRGO) 5 (B_0x5): Compare - OC2REFC signal is used as trigger output (TRGO) 6 (B_0x6): Compare - OC3REFC signal is used as trigger output (TRGO) 7 (B_0x7): Compare - OC4REFC signal is used as trigger output (TRGO)
TI1S	TI1 selection 0 (B_0x0): The TIMx_CH1 pin is connected to TI1 input 1 (B_0x1): The TIMx_CH1, CH2 and CH3 pins are connected to the TI1 input (XOR combination) See also Section23.

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