EOAIC=B_0x0, MCEIC=B_0x0
TSC interrupt clear register
| EOAIC | End of acquisition interrupt clear This bit is set by software to clear the end of acquisition flag and it is cleared by hardware when the flag is reset. Writing a 0 has no effect. 0 (B_0x0): No effect 1 (B_0x1): Clears the corresponding EOAF of the TSC_ISR register |
| MCEIC | Max count error interrupt clear This bit is set by software to clear the max count error flag and it is cleared by hardware when the flag is reset. Writing a 0 has no effect. 0 (B_0x0): No effect 1 (B_0x1): Clears the corresponding MCEF of the TSC_ISR register |