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STMicroelectronics /STM32U031 /TSC /TSC_IER

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Interpret as TSC_IER

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (B_0x0)EOAIE 0 (B_0x0)MCEIE

MCEIE=B_0x0, EOAIE=B_0x0

Description

TSC interrupt enable register

Fields

EOAIE

End of acquisition interrupt enable This bit is set and cleared by software to enable/disable the end of acquisition interrupt.

0 (B_0x0): End of acquisition interrupt disabled

1 (B_0x1): End of acquisition interrupt enabled
MCEIE

Max count error interrupt enable This bit is set and cleared by software to enable/disable the max count error interrupt.

0 (B_0x0): Max count error interrupt disabled

1 (B_0x1): Max count error interrupt enabled

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data