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STMicroelectronics /STM32U073 /DMAMUX /DMAMUX_RGCFR

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Interpret as DMAMUX_RGCFR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (COF0)COF0 0 (COF1)COF1 0 (COF2)COF2 0 (COF3)COF3

Description

DMAMUX request generator interrupt clear flag register

Fields

COF0

Clear trigger overrun event flag Writing 1 in each bit clears the corresponding overrun flag OFx in the DMAMUX_RGSR register.
COF1

Clear trigger overrun event flag Writing 1 in each bit clears the corresponding overrun flag OFx in the DMAMUX_RGSR register.
COF2

Clear trigger overrun event flag Writing 1 in each bit clears the corresponding overrun flag OFx in the DMAMUX_RGSR register.
COF3

Clear trigger overrun event flag Writing 1 in each bit clears the corresponding overrun flag OFx in the DMAMUX_RGSR register.

Links

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data