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STMicroelectronics /STM32U083 /AES /AES_IER

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Interpret as AES_IER

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (B_0x0)CCFIE 0 (B_0x0)RWEIE 0 (B_0x0)KEIE

KEIE=B_0x0, RWEIE=B_0x0, CCFIE=B_0x0

Description

AES interrupt enable register

Fields

CCFIE

Computation complete flag interrupt enable This bit enables or disables (masks) the AES interrupt generation when CCF (computation complete flag) is set.

0 (B_0x0): Disabled (masked)

1 (B_0x1): Enabled (not masked)
RWEIE

Read or write error interrupt enable This bit enables or disables (masks) the AES interrupt generation when RWEIF (read and/or write error flag) is set.

0 (B_0x0): Disabled (masked)

1 (B_0x1): Enabled (not masked)
KEIE

Key error interrupt enable This bit enables or disables (masks) the AES interrupt generation when KEIF (key error flag) is set.

0 (B_0x0): Disabled (masked)

1 (B_0x1): Enabled (not masked)

Links

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data