AES_IVR0

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Interpret as AES_IVR0

Description

AES initialization vector register 0

Fields

IVI

Initialization vector input, bits [31:0] AES_IVRx registers store the 128-bit initialization vector or the nonce, depending on the chaining mode selected. This value is updated by hardware after each computation round (when applicable). Write to this register is ignored when EN bit is set in AES_SR register

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