LPTIM2SMEN=B_0x0, TIM3SMEN=B_0x0, I2C3SMEN=B_0x0, USART4SMEN=B_0x0, WWDGSMEN=B_0x0, TIM7SMEN=B_0x0, DAC1SMEN=B_0x0, TIM2SMEN=B_0x0, I2C4SMEN=B_0x0, LPUART2SMEN=B_0x0, LCDSMEN=B_0x0, LPUART1SMEN=B_0x0, USBSMEN=B_0x0, OPAMPSMEN=B_0x0, I2C2SMEN=B_0x0, SPI3SMEN=B_0x0, SPI2SMEN=B_0x0, LPTIM3SMEN=B_0x0, USART3SMEN=B_0x0, LPTIM1SMEN=B_0x0, PWRSMEN=B_0x0, I2C1SMEN=B_0x0, USART2SMEN=B_0x0, CRSSMEN=B_0x0, RTCAPBSMEN=B_0x0, LPUART3SMEN=B_0x0, TIM6SMEN=B_0x0
APB peripheral clock enable in Sleep/Stop mode register 1
| TIM2SMEN | TIM2 timer clock enable during Sleep mode Set and cleared by software. 0 (B_0x0): Disable 1 (B_0x1): Enable |
| TIM3SMEN | TIM3 timer clock enable during Sleep mode Set and cleared by software. 0 (B_0x0): Disable 1 (B_0x1): Enable |
| TIM6SMEN | TIM6 timer clock enable during Sleep mode Set and cleared by software. 0 (B_0x0): Disable 1 (B_0x1): Enable |
| TIM7SMEN | TIM7 timer clock enable during Sleep mode Set and cleared by software. 0 (B_0x0): Disable 1 (B_0x1): Enable |
| LPUART2SMEN | LPUART2 clock enable during Sleep and Stop modes Set and cleared by software. 0 (B_0x0): Disable 1 (B_0x1): Enable |
| LCDSMEN | LCD clock enable during Sleep mode(1) Set and cleared by software. 0 (B_0x0): Disable 1 (B_0x1): Enable |
| RTCAPBSMEN | RTC APB clock enable during Sleep mode Set and cleared by software. 0 (B_0x0): Disable 1 (B_0x1): Enable |
| WWDGSMEN | WWDG clock enable during Sleep and Stop modes Set and cleared by software. 0 (B_0x0): Disable 1 (B_0x1): Enable |
| LPUART3SMEN | LPUART3 clock enable during Sleep and Stop modes Set and cleared by software. 0 (B_0x0): Disable 1 (B_0x1): Enable |
| USBSMEN | USB clock enable during Sleep mode(1) Set and cleared by software. 0 (B_0x0): Disable 1 (B_0x1): Enable |
| SPI2SMEN | SPI2 clock enable during Sleep mode Set and cleared by software. 0 (B_0x0): Disable 1 (B_0x1): Enable |
| SPI3SMEN | SPI3 clock enable during Sleep mode(1) Set and cleared by software. 0 (B_0x0): Disable 1 (B_0x1): Enable |
| CRSSMEN | CRS clock enable during Sleep and Stop modes(1) Set and cleared by software. 0 (B_0x0): Disable 1 (B_0x1): Enable |
| USART2SMEN | USART2 clock enable during Sleep and Stop modes Set and cleared by software. 0 (B_0x0): Disable 1 (B_0x1): Enable |
| USART3SMEN | USART3 clock enable during Sleep mode Set and cleared by software. 0 (B_0x0): Disable 1 (B_0x1): Enable |
| USART4SMEN | USART4 clock enable during Sleep mode Set and cleared by software. 0 (B_0x0): Disable 1 (B_0x1): Enable |
| LPUART1SMEN | LPUART1 clock enable during Sleep and Stop modes Set and cleared by software. 0 (B_0x0): Disable 1 (B_0x1): Enable |
| I2C1SMEN | I2C1 clock enable during Sleep and Stop modes Set and cleared by software. 0 (B_0x0): Disable 1 (B_0x1): Enable |
| I2C2SMEN | I2C2 clock enable during Sleep mode Set and cleared by software. 0 (B_0x0): Disable 1 (B_0x1): Enable |
| I2C3SMEN | I2C3 clock enable during Sleep mode Set and cleared by software. 0 (B_0x0): Disable 1 (B_0x1): Enable |
| OPAMPSMEN | OPAMP clock enable during Sleep and Stop modes Set and cleared by software. 0 (B_0x0): Disable 1 (B_0x1): Enable |
| I2C4SMEN | I2C4 clock enable during Sleep mode(1) Set and cleared by software. 0 (B_0x0): Disable 1 (B_0x1): Enable |
| LPTIM3SMEN | Low power timer 3 clock enable during Sleep mode Set and cleared by software. 0 (B_0x0): Disable 1 (B_0x1): Enable |
| PWRSMEN | Power interface clock enable during Sleep mode Set and cleared by software. 0 (B_0x0): Disable 1 (B_0x1): Enable |
| DAC1SMEN | DAC1 interface clock enable during Sleep and Stop modes Set and cleared by software. 0 (B_0x0): Disable 1 (B_0x1): Enable |
| LPTIM2SMEN | Low Power Timer 2 clock enable during Sleep and Stop modes Set and cleared by software. 0 (B_0x0): Disable 1 (B_0x1): Enable |
| LPTIM1SMEN | Low Power Timer 1 clock enable during Sleep and Stop modes Set and cleared by software. 0 (B_0x0): Disable 1 (B_0x1): Enable |