Regviz

STMicroelectronics /STM32U575 /ADC1 /ADC_HTR1

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as ADC_HTR1

Share

Cut and paste this URL to share the unmodified register and value:

https://regviz.com/r/STMicroelectronics/STM32U575/ADC1/ADC_HTR1#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0HTR10 (B_0x0)AWDFILT1

AWDFILT1=B_0x0

Description

ADC watchdog threshold register 1

Fields

HTR1

Analog watchdog 1 higher threshold These bits are written by software to define the higher threshold for the analog watchdog 1. Refer to AWD2CH, AWD3CH, AWD_HTRy, AWD_LTRy, AWDy).
AWDFILT1

Analog watchdog filtering parameter This bit is set and cleared by software. … Note: The software is allowed to write this bit only when ADSTART = 0 and JADSTART = 0 (which ensures that no conversion is ongoing).

0 (B_0x0): No filtering

1 (B_0x1): two consecutive detection generates an AWDx flag or an interrupt

7 (B_0x7): Eight consecutive detection generates an AWDx flag or an interrupt

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data