STMicroelectronics /STM32U575 /ADC1 /ADC_SQR2

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Interpret as ADC_SQR2

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0SQ50SQ60SQ70SQ80SQ9

Description

ADC regular sequence register 2

Fields

SQ5

5th conversion in regular sequence These bits are written by software with the channel number (0…19) assigned as the 5th in the regular conversion sequence. Note: The software is allowed to write these bits only when ADSTART = 0 (which ensures that no regular conversion is ongoing).

SQ6

6th conversion in regular sequence These bits are written by software with the channel number (0…19) assigned as the 6th in the regular conversion sequence. Note: The software is allowed to write these bits only when ADSTART = 0 (which ensures that no regular conversion is ongoing).

SQ7

7th conversion in regular sequence These bits are written by software with the channel number (0…19) assigned as the 7th in the regular conversion sequence. Note: The software is allowed to write these bits only when ADSTART = 0 (which ensures that no regular conversion is ongoing).

SQ8

8th conversion in regular sequence These bits are written by software with the channel number (0…19) assigned as the 8th in the regular conversion sequence Note: The software is allowed to write these bits only when ADSTART = 0 (which ensures that no regular conversion is ongoing).

SQ9

9th conversion in regular sequence These bits are written by software with the channel number (0…19) assigned as the 9th in the regular conversion sequence. Note: The software is allowed to write these bits only when ADSTART = 0 (which ensures that no regular conversion is ongoing).

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