AR=B_0x0, TESRC=B_0x0, VSPOL=B_0x0, COLMUX=B_0x0, DSIM=B_0x0, TEPOL=B_0x0
DSI Wrapper configuration register
| DSIM | DSI mode This bit selects the mode for the video transmission. This bit must only be changed when DSI Host is stopped (DSI_CR.EN = 0). 0 (B_0x0): Video mode 1 (B_0x1): Adapted command mode |
| COLMUX | Color multiplexing This bit selects the color multiplexing used by DSI Host. This field must only be changed when DSI is stopped (DSI_WCR.DSIEN = 0 and DSI_CR.ENÂ =Â 0). 0 (B_0x0): 16-bit configuration 1 1 (B_0x1): 16-bit configuration 2 2 (B_0x2): 16-bit configuration 3 3 (B_0x3): 18-bit configuration 1 4 (B_0x4): 18-bit configuration 2 5 (B_0x5): 24-bit |
| TESRC | TE source This bit selects the tearing effect (TE) source. This bit must only be changed when DSI Host is stopped (DSI_CR.EN = 0). 0 (B_0x0): DSI Link 1 (B_0x1): External pin |
| TEPOL | TE polarity This bit selects the polarity of the external pin tearing effect (TE) source. This bit must only be changed when DSI Host is stopped (DSI_CR.EN = 0). 0 (B_0x0): rising edge. 1 (B_0x1): falling edge. |
| AR | Automatic refresh This bit selects the refresh mode in DBI mode. This bit must only be changed when DSI Host is stopped (DSI_CR.EN = 0). 0 (B_0x0): automatic refresh mode disabled 1 (B_0x1): automatic refresh mode enabled |
| VSPOL | VSync polarity This bit selects the VSync edge on which the LTDC is halted. This bit must only be changed when DSI is stopped (DSI_WCR.DSIEN = 0 and DSI_CR.ENÂ =Â 0). 0 (B_0x0): LTDC halted on a falling edge 1 (B_0x1): LTDC halted on a rising edge |