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STMicroelectronics /STM32U599 /GFXMMU /GFXMMU_B1CR

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Interpret as GFXMMU_B1CR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0PBO0PBBA

Description

GFXMMU buffer 1 configuration register

Fields

PBO

Physical buffer offset Offset of the physical buffer.
PBBA

Physical buffer base address Base address MSB of the physical buffer.

Links

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data