STMicroelectronics /STM32U599 /GTZC1_TZSC /TZSC_SECCFGR3

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as TZSC_SECCFGR3

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (MDF1SEC)MDF1SEC 0 (CORDICSEC)CORDICSEC 0 (FMACSEC)FMACSEC 0 (CRCSEC)CRCSEC 0 (TSCSEC)TSCSEC 0 (DMA2DSEC)DMA2DSEC 0 (ICACHE_REGSEC)ICACHE_REGSEC 0 (DCACHE1_REGSEC)DCACHE1_REGSEC 0 (ADC1SEC)ADC1SEC 0 (DCMISEC)DCMISEC 0 (OTGFSSEC)OTGFSSEC 0 (HASHSEC)HASHSEC 0 (RNGSEC)RNGSEC 0 (OCTOSPIMSEC)OCTOSPIMSEC 0 (SDMMC1SEC)SDMMC1SEC 0 (SDMMC2SEC)SDMMC2SEC 0 (FSMC_REGSEC)FSMC_REGSEC 0 (OCTOSPI1_REGSEC)OCTOSPI1_REGSEC 0 (OCTOSPI2_REGSEC)OCTOSPI2_REGSEC 0 (RAMCFGSEC)RAMCFGSEC 0 (GPU2DSEC)GPU2DSEC 0 (GFXMMUSEC)GFXMMUSEC 0 (GFXMMU_REGSEC)GFXMMU_REGSEC 0 (HSPI1_REGSEC)HSPI1_REGSEC 0 (DCACHE2_REGSEC)DCACHE2_REGSEC

Description

TZSC secure configuration register 3

Fields

MDF1SEC

secure access mode for MDF1

CORDICSEC

secure access mode for CORDIC

FMACSEC

secure access mode for FMAC

CRCSEC

secure access mode for CRC

TSCSEC

secure access mode for TSC

DMA2DSEC

secure access mode for register of DMA2D

ICACHE_REGSEC

secure access mode for ICACHE registers

DCACHE1_REGSEC

secure access mode for DCACHE1 registers

ADC1SEC

secure access mode for ADC1

DCMISEC

secure access mode for DCMI

OTGFSSEC

secure access mode for OTG_FS

HASHSEC

secure access mode for HASH

RNGSEC

secure access mode for RNG

OCTOSPIMSEC

secure access mode for OCTOSPIM

SDMMC1SEC

secure access mode for SDMMC2

SDMMC2SEC

secure access mode for SDMMC1

FSMC_REGSEC

secure access mode for FSMC registers

OCTOSPI1_REGSEC

secure access mode for OCTOSPI1 registers

OCTOSPI2_REGSEC

secure access mode for OCTOSPI2 registers

RAMCFGSEC

secure access mode for RAMCFG

GPU2DSEC

GPU2DSEC

GFXMMUSEC

GFXMMUSEC

GFXMMU_REGSEC

GFXMMU_REGSEC

HSPI1_REGSEC

HSPI1_REGSEC

DCACHE2_REGSEC

DCACHE2_REGSEC

Links

()