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STMicroelectronics /STM32U599 /HSPI1 /HSPI_CALFCR

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Interpret as HSPI_CALFCR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FINE0COARSE0 (CALMAX)CALMAX

Description

HSPI full-cycle calibration configuration

Fields

FINE

[6: 0]: Fine calibration The unitary value of delay for this field depends on product technology (refer to the product datasheet).
COARSE

[4: 0]: Coarse calibration The unitary value of delay for this field depends on product technology (refer to the product datasheet).
CALMAX

Max value This bit gets set when the memory-clock period is outside the range of DLLM, in which case HSPI_CALFCR and HSPI_CALSR are updated with the values for the maximum delay.

Links

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data