STMicroelectronics /STM32U599 /HSPI1 /HSPI_DCR3

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Interpret as HSPI_DCR3

31282724232019161512118743000000000000000000000000000000000000000000 (B_0x0)MAXTRAN0 (B_0x0)CSBOUND

CSBOUND=B_0x0, MAXTRAN=B_0x0

Description

HSPI device configuration register 3

Fields

MAXTRAN

Maximum transfer This field enables the communication regulation feature. The nCS is released every MAXTRAN+1 clock cycles when the other HSPI request the access to the bus. others: Maximum communication is set to MAXTRAN+1 bytes

0 (B_0x0): Maximum communication disabled

CSBOUND

CS boundary This field enables the transaction boundary feature. When active, a minimum value of 3 is recommended. The nCS is released on each boundary of 2CSBOUND bytes. others: CS boundary set to 2CSBOUND bytes

0 (B_0x0): CS boundary disabled

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