LM=B_0x0, WZL=B_0x0
HSPI HyperBus latency configuration register
| LM | Latency mode This bit selects the Latency mode. 0 (B_0x0): Variable initial latency 1 (B_0x1): Fixed latency |
| WZL | Write zero latency This bit enables zero latency on write operations. 0 (B_0x0): Latency on write accesses 1 (B_0x1): No latency on write accesses |
| TACC | [7: 0]: Access time Device access time expressed in number of communication clock cycles |
| TRWR | Read write recovery time Device read write recovery time expressed in number of communication clock cycles |