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STMicroelectronics /STM32U599 /PWR /PWR_CR3

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Interpret as PWR_CR3

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (B_0x0)REGSEL 0 (B_0x0)FSTEN

REGSEL=B_0x0, FSTEN=B_0x0

Description

PWR control register 3

Fields

REGSEL

Regulator selection Note: REGSEL is reserved and must be kept at reset value in packages without SMPS.

0 (B_0x0): LDO selected

1 (B_0x1): SMPS selected
FSTEN

Fast soft start

0 (B_0x0): LDO/SMPS fast startup disabled (limited inrush current)

1 (B_0x1): LDO/SMPS fast startup enabled

Links

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data