STMicroelectronics /STM32U599 /RCC /RCC_AHB2RSTR2

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Interpret as RCC_AHB2RSTR2

HSPI1RST=B_0x0, OCTOSPI2RST=B_0x0, FSMCRST=B_0x0, OCTOSPI1RST=B_0x0

Description

RCC AHB2 peripheral reset register 2

Fields

FSMCRST	Flexible memory controller reset This bit is set and cleared by software. Note: This bit is only available on some devices in the STM32U5 Series. Refer to the device datasheet for availability of its associated peripheral. If not present, consider this bit as reserved and keep it at reset value. 0 (B_0x0): No effect 1 (B_0x1): Reset the FSMC
OCTOSPI1RST	OCTOSPI1 reset This bit is set and cleared by software. 0 (B_0x0): No effect 1 (B_0x1): Reset the OCTOSPI1.
OCTOSPI2RST	OCTOSPI2 reset This bit is set and cleared by software. Note: This bit is only available on some devices in the STM32U5 Series. Refer to the device datasheet for availability of its associated peripheral. If not present, consider this bit as reserved and keep it at reset value. 0 (B_0x0): No effect 1 (B_0x1): Reset the OCTOSPI2.
HSPI1RST	HSPI1 reset This bit is set and cleared by software. Note: This bit is only available on some devices in the STM32U5 Series. Refer to the device datasheet for availability of its associated peripheral. If not present, consider this bit as reserved and keep it at reset value. 0 (B_0x0): No effect 1 (B_0x1): Reset the HSPI1.

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