STMicroelectronics /STM32U5Fx /GFXTIM /GFXTIM_IER

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Interpret as GFXTIM_IER

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (B_0x0)AFCOIE 0 (B_0x0)ALCOIE 0 (B_0x0)TEIE 0 (B_0x0)AFCC1IE 0 (B_0x0)ALCC1IE 0 (B_0x0)ALCC2IE 0 (B_0x0)RFC1RIE 0 (B_0x0)RFC2RIE 0 (B_0x0)EV1IE 0 (B_0x0)EV2IE 0 (B_0x0)EV3IE 0 (B_0x0)EV4IE 0 (B_0x0)WDGAIE 0 (B_0x0)WDGPIE

RFC1RIE=B_0x0, EV2IE=B_0x0, ALCC2IE=B_0x0, AFCC1IE=B_0x0, TEIE=B_0x0, WDGPIE=B_0x0, RFC2RIE=B_0x0, AFCOIE=B_0x0, WDGAIE=B_0x0, EV3IE=B_0x0, ALCOIE=B_0x0, ALCC1IE=B_0x0, EV4IE=B_0x0, EV1IE=B_0x0

Description

GFXTIM interrupt enable register

Fields

AFCOIE

absolute frame counter overflow interrupt enable This bit enables the absolute frame counter overflow interrupt generation.

0 (B_0x0): absolute frame counter overflow interrupt disabled

1 (B_0x1): absolute frame counter overflow interrupt enabled

ALCOIE

absolute line counter overflow interrupt enable This bit enables the absolute line counter overflow interrupt generation.

0 (B_0x0): absolute line counter overflow interrupt disabled

1 (B_0x1): absolute line counter overflow interrupt enabled

TEIE

tearing-effect interrupt enable This bit enables the Tearing Effect interrupt generation.

0 (B_0x0): tearing-effect interrupt disabled

1 (B_0x1): tearing-effect interrupt enabled

AFCC1IE

absolute frame counter compare 1 interrupt enable This bit enables the absolute frame counter compare interrupt generation.

0 (B_0x0): absolute frame counter compare 1 interrupt disabled

1 (B_0x1): absolute frame counter compare 1 interrupt enabled

ALCC1IE

absolute line counter compare 1 interrupt enable This bit enables the absolute line counter compare 1 interrupt generation.

0 (B_0x0): absolute line counter compare 1 interrupt disabled

1 (B_0x1): absolute line counter compare 1 interrupt enabled

ALCC2IE

absolute line counter compare 2 interrupt enable This bit enables the absolute line counter compare 2 interrupt generation.

0 (B_0x0): absolute line counter compare 2 interrupt disabled

1 (B_0x1): absolute line counter compare 2 interrupt enabled

RFC1RIE

relative frame counter 1 reload interrupt enable This bit enables the relative frame counter 1 reload interrupt generation.

0 (B_0x0): relative frame counter 1 reload interrupt disabled

1 (B_0x1): relative frame counter 1 reload interrupt enabled

RFC2RIE

relative frame counter 2 reload interrupt enable This bit enables the relative frame counter 2 reload interrupt generation.

0 (B_0x0): relative frame counter 2 reload interrupt disabled

1 (B_0x1): relative frame counter 2 reload interrupt enabled

EV1IE

event 1 interrupt enable This bit enables the complex event 1 interrupt generation.

0 (B_0x0): event 1 interrupt disabled

1 (B_0x1): event 1 interrupt enabled

EV2IE

event 2 interrupt enable This bit enables the complex event 2 interrupt generation.

0 (B_0x0): event 2 interrupt disabled

1 (B_0x1): event 2 interrupt enabled

EV3IE

event 3 interrupt enable This bit enables the complex event 3 interrupt generation.

0 (B_0x0): event 3 interrupt disabled

1 (B_0x1): event 3 interrupt enabled

EV4IE

event 4 interrupt enable This bit enables the complex event 4 interrupt generation.

0 (B_0x0): event 4 interrupt disabled

1 (B_0x1): event 4 interrupt enabled

WDGAIE

watchdog alarm interrupt enable This bit enables the watchdog alarm interrupt generation.

0 (B_0x0): watchdog alarm interrupt disabled

1 (B_0x1): watchdog alarm interrupt enabled

WDGPIE

watchdog pre-alarm interrupt enable This bit enables the watchdog pre-alarm interrupt generation.

0 (B_0x0): watchdog pre-alarm interrupt disabled

1 (B_0x1): watchdog pre-alarm interrupt enabled

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