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STMicroelectronics /STM32U5Fx /GFXTIM /GFXTIM_ISR

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Interpret as GFXTIM_ISR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (B_0x0)AFCOF 0 (B_0x0)ALCOF 0 (B_0x0)TEF 0 (B_0x0)AFCC1F 0 (B_0x0)ALCC1F 0 (B_0x0)ALCC2F 0 (B_0x0)RFC1RF 0 (B_0x0)RFC2RF 0 (B_0x0)EV1F 0 (B_0x0)EV2F 0 (B_0x0)EV3F 0 (B_0x0)EV4F 0 (B_0x0)WDGAF 0 (B_0x0)WDGPF

ALCC1F=B_0x0, AFCOF=B_0x0, EV3F=B_0x0, EV4F=B_0x0, EV1F=B_0x0, ALCC2F=B_0x0, AFCC1F=B_0x0, TEF=B_0x0, RFC1RF=B_0x0, RFC2RF=B_0x0, EV2F=B_0x0, WDGPF=B_0x0, ALCOF=B_0x0, WDGAF=B_0x0

Description

GFXTIM interrupt status register

Fields

AFCOF

absolute frame counter overflow flag This bit indicates an overflow occurred on the absolute frame counter.

0 (B_0x0): no overflow occurred on the absolute frame counter.

1 (B_0x1): a overflow on the absolute frame counter occurred.
ALCOF

absolute line counter overflow flag This bit indicates an overflow occurred on the absolute line counter.

0 (B_0x0): no overflow occurred on the absolute line counter.

1 (B_0x1): a overflow on the absolute line counter occurred.
TEF

tearing-effect flag This bit indicates a tearing effect event occurred.

0 (B_0x0): no tearing effect occurred.

1 (B_0x1): a tearing effect occurred.
AFCC1F

absolute frame counter compare 1 flag This bit indicates match on compare 1 of the absolute frame counter.

0 (B_0x0): no match occurred on compare 1 of the absolute frame counter.

1 (B_0x1): a match on compare 1 of the absolute frame counter occurred.
ALCC1F

absolute line counter compare 1 flag This bit indicates match on compare 1 of the absolute line counter.

0 (B_0x0): no match occurred on compare 1 of the absolute line counter.

1 (B_0x1): a match on compare 1 of the absolute line counter occurred.
ALCC2F

absolute line counter compare 2 flag This bit indicates match on compare 2 of the absolute line counter.

0 (B_0x0): no match occurred on compare 2 of the absolute line counter.

1 (B_0x1): a match on compare 2 of the absolute line counter occurred.
RFC1RF

relative frame counter 1 reload flag This bit indicates relative frame counter 1 has been reloaded.

0 (B_0x0): no reload occurred on relative frame counter 1.

1 (B_0x1): a reload on relative frame counter 1 occurred.
RFC2RF

relative frame counter 2 reload flag This bit indicates relative frame counter 2 has been reloaded.

0 (B_0x0): no reload occurred on relative frame counter 2.

1 (B_0x1): a reload on relative frame counter 2 occurred.
EV1F

event 1 flag This bit indicates a complex event 1 occurred.

0 (B_0x0): No complex event 1 occurred.

1 (B_0x1): Complex event 1 occurred.
EV2F

event 2 flag This bit indicates a complex event 2 occurred.

0 (B_0x0): no complex event 2 occurred.

1 (B_0x1): a complex event 2 occurred.
EV3F

event 3 flag This bit indicates a complex event 3 occurred.

0 (B_0x0): no complex event 3 occurred.

1 (B_0x1): a complex event 3 occurred.
EV4F

event 4 flag This bit indicates a complex event 4 occurred.

0 (B_0x0): no complex event 4 occurred.

1 (B_0x1): a complex event 4 occurred.
WDGAF

watchdog alarm flag This bit indicates that a graphic watchdog alarm occurred.

0 (B_0x0): no graphic watchdog alarm occurred.

1 (B_0x1): a graphic watchdog alarm occurred.
WDGPF

watchdog pre-alarm flag This bit indicates that a graphic watchdog pre-alarm occurred.

0 (B_0x0): no graphic watchdog pre-alarm occurred.

1 (B_0x1): a graphic watchdog pre-alarm occurred.

Links

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data