AFCEN=B_0x0, FRFC1R=B_0x0, RFC1EN=B_0x0, FALCR=B_0x0, ALCEN=B_0x0, FAFCR=B_0x0, RFC2CM=B_0x0, RFC1CM=B_0x0, RFC2EN=B_0x0, FRFC2R=B_0x0
GFXTIM timers configuration register
AFCEN | absolute frame counter enable This bit enables the absolute frame counter. 0 (B_0x0): no effect 1 (B_0x1): absolute frame counter enabled |
FAFCR | force absolute frame counter reset This bit forces the reset of the absolute frame counter. 0 (B_0x0): no effect 1 (B_0x1): absolute frame counter reset forced |
ALCEN | absolute line counter enable This bit enables the absolute line counter. 0 (B_0x0): no effect 1 (B_0x1): absolute line counter enabled |
FALCR | force absolute line counter reset This bit forces the reset of the absolute line counter. 0 (B_0x0): no effect 1 (B_0x1): absolute line counter reset forced |
RFC1EN | relative frame counter 1 enable This bit enables the relative frame counter 1. 0 (B_0x0): no effect 1 (B_0x1): relative frame counter enabled |
RFC1CM | relative frame counter 1 continuous mode This bit enables the continuous mode of the relative frame counter 1. 0 (B_0x0): relative frame counter 1 is one shot. 1 (B_0x1): relative frame counter 1 is in continuous mode. |
FRFC1R | force relative frame counter 1 reload This bit forces the reload of the relative frame counter 1. 0 (B_0x0): no effect 1 (B_0x1): relative frame counter 1 reload forced |
RFC2EN | relative frame counter 2 enable This bit enables the relative frame counter 2. 0 (B_0x0): no effect 1 (B_0x1): relative frame counter 2 enabled |
RFC2CM | relative frame counter 2 continuous mode This bit enables the continuous mode of the relative frame counter 2. 0 (B_0x0): relative frame counter 2 is one shot. 1 (B_0x1): relative frame counter 2 is in continuous mode. |
FRFC2R | force relative frame counter 2 reload This bit forces the reload of the relative frame counter 2. 0 (B_0x0): no effect 1 (B_0x1): relative frame counter 2 reload forced |