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STMicroelectronics /STM32W108 /CLK /CLK_CPUCR

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Interpret as CLK_CPUCR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (SW2)SW2

Description

Clock source select register

Fields

SW2

12MHz/24MHz is selected

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data