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STMicroelectronics /STM32W108 /GPIOA /GPIOA_BRR

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Interpret as GPIOA_BRR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (BR0)BR0 0 (BR1)BR1 0 (BR2)BR2 0 (BR3)BR3 0 (BR4)BR4 0 (BR5)BR5 0 (BR6)BR6 0 (BR7)BR7

Description

Port A output clear register

Fields

BR0

BR0
BR1

BR1
BR2

BR2
BR3

BR3
BR4

BR4
BR5

BR5
BR6

BR6
BR7

BR7

Links

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data