Regviz

Spansion /MB9BF36xx /WC /CLK_SEL

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Interpret as CLK_SEL

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15 1211 87 43 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0SEL_IN 0SEL_OUT

Description

register CLK_SEL

Fields

SEL_IN

bitfield SEL_IN
SEL_OUT

bitfield SEL_OUT

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data