stm32 /stm32c0 /STM32C011 /PWR /PWR_CR3

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Interpret as PWR_CR3

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (EWUP1)EWUP1 0 (EWUP2)EWUP2 0 (EWUP3)EWUP3 0 (EWUP4)EWUP4 0 (EWUP6)EWUP6 0 (B_0x0)APC 0 (B_0x0)EIWUL

APC=B_0x0, EIWUL=B_0x0

Description

PWR control register 3

Fields

EWUP1

Enable WKUP1 wakeup pin When this bit is set, the WKUP1 external wakeup pin is enabled and triggers a wakeup event when a rising or a falling edge occurs. The active edge is configured via the WP1 bit of the PWR_CR4 register.

EWUP2

Enable WKUP2 wakeup pin When this bit is set, the WKUP2 external wakeup pin is enabled and triggers a wakeup event when a rising or a falling edge occurs. The active edge is configured via the WP2 bit of the PWR_CR4 register.

EWUP3

Enable WKUP3 wakeup pin When this bit is set, the WKUP3 external wakeup pin is enabled and triggers a wakeup event when a rising or a falling edge occurs. The active edge is configured via the WP3 bit of the PWR_CR4 register.

EWUP4

Enable WKUP4 wakeup pin When this bit is set, the WKUP4 external wakeup pin is enabled and triggers a wakeup event when a rising or a falling edge occurs. The active edge is configured via the WP4 bit in the PWR_CR4 register.

EWUP6

Enable WKUP6 wakeup pin When this bit is set, the WKUP6 external wakeup pin is enabled and triggers a wakeup event when a rising or a falling edge occurs. The active edge is configured through WP6 bit in the PWR_CR4 register.

APC

Apply pull-up and pull-down configuration This bit determines whether the I/O pull-up and pull-down configurations defined in the PWR_PUCRx and PWR_PDCRx registers are applied.

0 (B_0x0): Not applied

1 (B_0x1): Applied

EIWUL

Enable internal wakeup line When set, a rising edge on the internal wakeup line triggers a wakeup event.

0 (B_0x0): Disable

1 (B_0x1): Enable

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