ADCSMEN=B_0x0, TIM14SMEN=B_0x0, USART1SMEN=B_0x0, TIM16SMEN=B_0x0, SYSCFGSMEN=B_0x0, SPI1SMEN=B_0x0, TIM1SMEN=B_0x0, TIM17SMEN=B_0x0
RCC APB peripheral clock enable in Sleep/Stop mode register 2
| SYSCFGSMEN | SYSCFG clock enable during Sleep and Stop modes Set and cleared by software. 0 (B_0x0): Disable 1 (B_0x1): Enable |
| TIM1SMEN | TIM1 timer clock enable during Sleep mode Set and cleared by software. 0 (B_0x0): Disable 1 (B_0x1): Enable |
| SPI1SMEN | SPI1 clock enable during Sleep mode Set and cleared by software. 0 (B_0x0): Disable 1 (B_0x1): Enable |
| USART1SMEN | USART1 clock enable during Sleep and Stop modes Set and cleared by software. 0 (B_0x0): Disable 1 (B_0x1): Enable |
| TIM14SMEN | TIM14 timer clock enable during Sleep mode Set and cleared by software. 0 (B_0x0): Disable 1 (B_0x1): Enable |
| TIM16SMEN | TIM16 timer clock enable during Sleep mode Set and cleared by software. 0 (B_0x0): Disable 1 (B_0x1): Enable |
| TIM17SMEN | TIM16 timer clock enable during Sleep mode Set and cleared by software. 0 (B_0x0): Disable 1 (B_0x1): Enable |
| ADCSMEN | ADC clock enable during Sleep mode Set and cleared by software. 0 (B_0x0): Disable 1 (B_0x1): Enable |