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stm32 /stm32c0 /STM32C071 /PWR /PWR_PDCRD

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Interpret as PWR_PDCRD

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (PD0)PD0 0 (PD1)PD1 0 (PD2)PD2 0 (PD3)PD3 0 (PD4)PD4 0 (PD5)PD5 0 (PD6)PD6 0 (PD8)PD8 0 (PD9)PD9

Description

PWR Port D pull-down control register

Fields

PD0

Port D pull-down bit i Setting PDi bit while the APC bit of the PWR_CR3 register is set activates a pull-down device on the PD[i] I/O. Not available on STM32C011xx. On STM32C031xx, only PD3 to PD0 are available. Note: For the same pin, this pull-down device must not be activated when a pull-up device is set through the GPIOx_PUPDR register.
PD1

Port D pull-down bit i Setting PDi bit while the APC bit of the PWR_CR3 register is set activates a pull-down device on the PD[i] I/O. Not available on STM32C011xx. On STM32C031xx, only PD3 to PD0 are available. Note: For the same pin, this pull-down device must not be activated when a pull-up device is set through the GPIOx_PUPDR register.
PD2

Port D pull-down bit i Setting PDi bit while the APC bit of the PWR_CR3 register is set activates a pull-down device on the PD[i] I/O. Not available on STM32C011xx. On STM32C031xx, only PD3 to PD0 are available. Note: For the same pin, this pull-down device must not be activated when a pull-up device is set through the GPIOx_PUPDR register.
PD3

Port D pull-down bit i Setting PDi bit while the APC bit of the PWR_CR3 register is set activates a pull-down device on the PD[i] I/O. Not available on STM32C011xx. On STM32C031xx, only PD3 to PD0 are available. Note: For the same pin, this pull-down device must not be activated when a pull-up device is set through the GPIOx_PUPDR register.
PD4

Port D pull-down bit i Setting PDi bit while the APC bit of the PWR_CR3 register is set activates a pull-down device on the PD[i] I/O. Not available on STM32C011xx. On STM32C031xx, only PD3 to PD0 are available. Note: For the same pin, this pull-down device must not be activated when a pull-up device is set through the GPIOx_PUPDR register.
PD5

Port D pull-down bit i Setting PDi bit while the APC bit of the PWR_CR3 register is set activates a pull-down device on the PD[i] I/O. Not available on STM32C011xx. On STM32C031xx, only PD3 to PD0 are available. Note: For the same pin, this pull-down device must not be activated when a pull-up device is set through the GPIOx_PUPDR register.
PD6

Port D pull-down bit i Setting PDi bit while the APC bit of the PWR_CR3 register is set activates a pull-down device on the PD[i] I/O. Not available on STM32C011xx. On STM32C031xx, only PD3 to PD0 are available. Note: For the same pin, this pull-down device must not be activated when a pull-up device is set through the GPIOx_PUPDR register.
PD8

Port D pull-down bit i Setting PDi bit while the APC bit of the PWR_CR3 register is set activates a pull-down device on the PD[i] I/O. Only available on STM32C071xx. Note: For the same pin, this pull-down device must not be activated when a pull-up device is set through the GPIOx_PUPDR register.
PD9

Port D pull-down bit i Setting PDi bit while the APC bit of the PWR_CR3 register is set activates a pull-down device on the PD[i] I/O. Only available on STM32C071xx. Note: For the same pin, this pull-down device must not be activated when a pull-up device is set through the GPIOx_PUPDR register.

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32