PWR Port F pull-down control register
| PD0 | Port F pull-down bit i Setting PDi bit while the APC bit of the PWR_CR3 register is set activates a pull-down device on the PF[i] I/O. On STM32C011xx, only PD2 is available. On STM32C031xx, only PD2 to PD0 are available. Note: For the same pin, this pull-down device must not be activated when a pull-up device is set through the GPIOx_PUPDR register. |
| PD1 | Port F pull-down bit i Setting PDi bit while the APC bit of the PWR_CR3 register is set activates a pull-down device on the PF[i] I/O. On STM32C011xx, only PD2 is available. On STM32C031xx, only PD2 to PD0 are available. Note: For the same pin, this pull-down device must not be activated when a pull-up device is set through the GPIOx_PUPDR register. |
| PD2 | Port F pull-down bit i Setting PDi bit while the APC bit of the PWR_CR3 register is set activates a pull-down device on the PF[i] I/O. On STM32C011xx, only PD2 is available. On STM32C031xx, only PD2 to PD0 are available. Note: For the same pin, this pull-down device must not be activated when a pull-up device is set through the GPIOx_PUPDR register. |
| PD3 | Port F pull-down bit i Setting PDi bit while the APC bit of the PWR_CR3 register is set activates a pull-down device on the PF[i] I/O. On STM32C011xx, only PD2 is available. On STM32C031xx, only PD2 to PD0 are available. Note: For the same pin, this pull-down device must not be activated when a pull-up device is set through the GPIOx_PUPDR register. |