PWR Port F pull-up control register
| PU0 | Port F pull-up bit i Setting PUi bit while the corresponding PDi bit is zero and the APC bit of the PWR_CR3 register is set activates a pull-up device on the PF[i] I/O. On STM32C011xx, only PU2 is available. On STM32C031xx, only PU2 to PU0 are available. Note: For the same pin, this pull-up device must not be activated when a pull-down device is set through the GPIOx_PUPDR register. |
| PU1 | Port F pull-up bit i Setting PUi bit while the corresponding PDi bit is zero and the APC bit of the PWR_CR3 register is set activates a pull-up device on the PF[i] I/O. On STM32C011xx, only PU2 is available. On STM32C031xx, only PU2 to PU0 are available. Note: For the same pin, this pull-up device must not be activated when a pull-down device is set through the GPIOx_PUPDR register. |
| PU2 | Port F pull-up bit i Setting PUi bit while the corresponding PDi bit is zero and the APC bit of the PWR_CR3 register is set activates a pull-up device on the PF[i] I/O. On STM32C011xx, only PU2 is available. On STM32C031xx, only PU2 to PU0 are available. Note: For the same pin, this pull-up device must not be activated when a pull-down device is set through the GPIOx_PUPDR register. |
| PU3 | Port F pull-up bit i Setting PUi bit while the corresponding PDi bit is zero and the APC bit of the PWR_CR3 register is set activates a pull-up device on the PF[i] I/O. On STM32C011xx, only PU2 is available. On STM32C031xx, only PU2 to PU0 are available. Note: For the same pin, this pull-up device must not be activated when a pull-down device is set through the GPIOx_PUPDR register. |