stm32 /stm32c0 /STM32C071 /RCC /RCC_APBRSTR1

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Interpret as RCC_APBRSTR1

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (B_0x0)TIM2RST 0 (B_0x0)TIM3RST 0 (B_0x0)USBRST 0 (B_0x0)SPI2RST 0 (B_0x0)CRSRST 0 (B_0x0)USART2RST 0 (B_0x0)I2C1RST 0 (B_0x0)I2C2RST 0 (B_0x0)DBGRST 0 (B_0x0)PWRRST

I2C2RST=B_0x0, USBRST=B_0x0, TIM2RST=B_0x0, DBGRST=B_0x0, USART2RST=B_0x0, I2C1RST=B_0x0, TIM3RST=B_0x0, CRSRST=B_0x0, PWRRST=B_0x0, SPI2RST=B_0x0

Description

RCC APB peripheral reset register 1

Fields

TIM2RST

TIM2 timer reset Set and cleared by software. Note: Only applicable on STM32C071xx, reserved on other devices.

0 (B_0x0): No effect

1 (B_0x1): Reset TIM2

TIM3RST

TIM3 timer reset Set and cleared by software.

0 (B_0x0): No effect

1 (B_0x1): Reset TIM3

USBRST

USB reset Set and cleared by software. Note: Only applicable on STM32C071xx, reserved on other devices.

0 (B_0x0): No effect

1 (B_0x1): Reset USB

SPI2RST

SPI2 reset Set and cleared by software. Note: Only applicable on STM32C071xx, reserved on other devices.

0 (B_0x0): No effect

1 (B_0x1): Reset SPI2

CRSRST

CRS reset Set and cleared by software. Note: Only applicable on STM32C071xx, reserved on other devices.

0 (B_0x0): No effect

1 (B_0x1): Reset CRS

USART2RST

USART2 reset Set and cleared by software.

0 (B_0x0): No effect

1 (B_0x1): Reset USART2

I2C1RST

I2C1 reset Set and cleared by software.

0 (B_0x0): No effect

1 (B_0x1): Reset I2C1

I2C2RST

I2C2 reset Set and cleared by software. Note: Only applicable on STM32C071xx, reserved on other devices.

0 (B_0x0): No effect

1 (B_0x1): Reset I2C2

DBGRST

Debug support reset Set and cleared by software.

0 (B_0x0): No effect

1 (B_0x1): Reset DBG

PWRRST

Power interface reset Set and cleared by software.

0 (B_0x0): No effect

1 (B_0x1): Reset PWR

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