ADCSEL=B_0x0, I2C1SEL=B_0x0, USART1SEL=B_0x0, I2S1SEL=B_0x0
RCC peripherals independent clock configuration register 1
| USART1SEL | USART1 clock source selection This bitfield is controlled by software to select USART1 clock source as follows: 0 (B_0x0): PCLK 1 (B_0x1): SYSCLK 2 (B_0x2): HSIKER 3 (B_0x3): LSE |
| I2C1SEL | I2C1 clock source selection This bitfield is controlled by software to select I2C1 clock source as follows: 0 (B_0x0): PCLK 1 (B_0x1): SYSCLK 2 (B_0x2): HSIKER |
| I2S1SEL | I2S1 clock source selection This bitfield is controlled by software to select I2S1 clock source as follows: 0 (B_0x0): SYSCLK 2 (B_0x2): HSIKER 3 (B_0x3): I2S_CKIN |
| ADCSEL | ADCs clock source selection This bitfield is controlled by software to select the asynchronous clock source for ADC: 0 (B_0x0): System clock 2 (B_0x2): HSIKER |