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stm32 /stm32c0 /STM32C071 /RCC /RCC_CCIPR2

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Interpret as RCC_CCIPR2

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (B_0x0)USBSEL

USBSEL=B_0x0

Description

RCC peripherals independent clock configuration register 2

Fields

USBSEL

USB clock source selection Set and cleared by software.

0 (B_0x0): HSIUSB48

1 (B_0x1): HSE

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32